SH7080_09 Datasheet, PDF (412/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 9 Bus State Controller (BSC)
Tm1
Tmd1w
Tmd1
CK
FRAME
D31 to D0
A
D
A25 to A0
CS6
RDWR
WAIT
BS
DACKn*
Note: * The waveform for DACKn is when active low is specified.
Figure 9.44 Burst MPX Space Access Timing (Single Read, No Wait or Software Wait 1)
Rev. 4.00 Dec. 15, 2009 Page 352 of 1558
REJ09B0181-0400