SH7080_09 Datasheet, PDF (736/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 12 Multi-Function Timer Pulse Unit 2S (MTU2S)
12.2 Register Descriptions
The MTU2S has the following registers. For details on register addresses and register states during
each process, refer to section 27, List of Registers. To distinguish registers in each channel, an
underscore and the channel number are added as a suffix to the register name; TCR for channel 3
is expressed as TCR_3S.
Table 12.3 Register Configuration
Register Name
Abbrevia-
tion
R/W
Timer control register_3S
TCR_3S R/W
Timer control register_4S
TCR_4S R/W
Timer mode register_3S
TMDR_3S R/W
Timer mode register_4S
TMDR_4S R/W
Timer I/O control register H_3S TIORH_3S R/W
Timer I/O control register L_3S TIORL_3S R/W
Timer I/O control register H_4S TIORH_4S R/W
Timer I/O control register L_4S TIORL_4S R/W
Timer interrupt enable
register_3S
TIER_3S R/W
Timer interrupt enable
register_4S
TIER_4S R/W
Timer output master enable TOERS R/W
register S
Timer gate control register S TGCRS R/W
Timer output control register 1S TOCR1S R/W
Timer output control register 2S TOCR2S R/W
Timer counter_3S
TCNT_3S R/W
Timer counter_4S
TCNT_4S R/W
Timer cycle data register S
TCDRS R/W
Timer dead time data register S TDDRS R/W
Timer general register A_3S TGRA_3S R/W
Timer general register B_3S TGRB_3S R/W
Timer general register A_4S TGRA_4S R/W
Timer general register B_4S TGRB_4S R/W
Initial Value Address
H'00
H'FFFFC600
H'00
H'FFFFC601
H'00
H'FFFFC602
H'00
H'FFFFC603
H'00
H'FFFFC604
H'00
H'FFFFC605
H'00
H'FFFFC606
H'00
H'FFFFC607
H'00
H'FFFFC608
H'00
H'FFFFC609
H'C0
H'FFFFC60A
H'80
H'00
H'00
H'0000
H'0000
H'FFFF
H'FFFF
H'FFFF
H'FFFF
H'FFFF
H'FFFF
H'FFFFC60D
H'FFFFC60E
H'FFFFC60F
H'FFFFC610
H'FFFFC612
H'FFFFC614
H'FFFFC616
H'FFFFC618
H'FFFFC61A
H'FFFFC61C
H'FFFFC61E
Access Size
8, 16, 32
8
8, 16
8
8, 16, 32
8
8, 16
8
8, 16
8
8
8
8, 16
8
16, 32
16
16, 32
16
16, 32
16
16, 32
16
Rev. 4.00 Dec. 15, 2009 Page 676 of 1558
REJ09B0181-0400