SH7080_09 Datasheet, PDF (802/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 15 Serial Communication Interface (SCI)
15.3.9 Serial Direction Control Register (SCSDCR)
The DIR bit in the serial direction control register (SCSDCR) selects LSB-first or MSB-first
transfer. With an 8-bit data length, LSB-first/MSB-first selection is available regardless of the
communication mode.
Bit: 7
6
5
4
3
2
1
0
-
-
-
-
DIR
-
-
-
Initial value: 1
1
1
1
0
0
1
0
R/W: R
R
R
R R/W R
R
R
Bit Bit Name
7 to 4 ⎯
Initial
Value
All 1
3
DIR
0
2
⎯
0
1
⎯
1
0
⎯
0
R/W Description
R
Reserved
These bits are always read as 1. The write value should
always be 1.
R/W Data Transfer Direction
Selects the serial/parallel conversion format. Valid for
an 8-bit transmit/receive format.
0: SCTDR contents are transmitted in LSB-first order
Receive data is stored in SCRDR in LSB-first
1: SCTDR contents are transmitted in MSB-first order
Receive data is stored in SCRDR in MSB-first
R
Reserved
This bit is always read as 0. The write value should
always be 0.
R
Reserved
This bit is always read as 1. The write value should
always be 1.
R
Reserved
This bit is always read as 0. The write value should
always be 0.
Rev. 4.00 Dec. 15, 2009 Page 742 of 1558
REJ09B0181-0400