SH7080_09 Datasheet, PDF (903/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 16 Serial Communication Interface with FIFO (SCIF)
In clock synchronous serial communication, each data bit is output on the communication line
from one falling edge of the serial clock to the next. Data is guaranteed valid at the rising edge of
the serial clock. In each character, the serial data bits are transmitted in order from the LSB (first)
to the MSB (last). After output of the MSB, the communication line remains in the state of the
MSB. In clock synchronous mode, the SCIF receives data in synchronization with the rising edge
of the serial clock.
(1) Communication Format
The data length is fixed at eight bits. No parity bit can be added.
(2) Clock
An internal clock generated by the on-chip baud rate generator or an external clock input from the
SCK pin can be selected as the SCIF transmit/receive clock.
When the SCIF operates on an internal clock, it outputs the clock signal at the SCK pin. Eight
clock pulses are output per transmitted or received character. When the SCIF is not transmitting or
receiving, the clock signal remains in the high state. When only receiving, the clock signal outputs
while the RE bit of SCSCR is 1 and the number of data in receive FIFO is more than the receive
FIFO data trigger number. In this case, 8 × (16 + 1) = 136 pulses of synchronous clock are output.
To perform reception of n characters of data, select an external clock as the clock source. If an
internal clock should be used, set RE = 1 and TE = 1 and receive n characters of data
simultaneously with the transmission of n characters of dummy data.
(3) Transmitting and Receiving Data
SCIF Initialization (Clock Synchronous Mode): Before transmitting, receiving, or changing the
mode or communication format, the software must clear the TE and RE bits to 0 in the serial
control register (SCSCR), then initialize the SCIF. Clearing TE to 0 initializes the transmit shift
register (SCTSR). Clearing RE to 0, however, does not initialize the RDF, PER, FER, and ORER
flags and receive data register (SCRDR), which retain their previous contents.
Rev. 4.00 Dec. 15, 2009 Page 843 of 1558
REJ09B0181-0400