SH7080_09 Datasheet, PDF(1610/1622 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

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SH7080_09 Datasheet, PDF (1610/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

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Item

Page

28.2 DC Characteristics 1410

Table 28.4 Permitted

Output Current Values

28.3.2 Control Signal

Timing

Table 28.7 Control

Signal Timing

1415

Appendix

B. Processing of

Unused Pins

1507

Revision (See Manual for Details)

Note amended

Note:

*

I = 15 mA (Max.)/âI = 5 mA (Max.) about pins

OL

OH

PD9, PD11 to PD15, PD24 to PD29, PE9, and

PE11 to PE21. IOL = 8 mA (Max.) about pins SCL

and SDA. However, at most three pins are

permitted to have simultaneously IOL/âIOH > 2.0 mA

among these pins.

Note amended

Notes: 1. The RES, MRES, NMI, BREQ, and IRQ7 to IRQ0

signals are asynchronous signals. When the setup

time is satisfied, change of signal level is detected

at the rising edge of the clock. If not, the detection

is delayed until the next rising edge of the clock.

Newly added

Rev. 4.00 Dec. 15, 2009 Page 1550 of 1558

REJ09B0181-0400

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