SH7080_09 Datasheet, PDF (404/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 9 Bus State Controller (BSC)
9.5.9 PCMCIA Interface
With this LSI, the PCMCIA interface can be specified in areas 5 and 6. Areas 5 and 6 can be used
for the IC memory card and I/O card interface defined in the JEIDA specifications version 4.2
(PCMCIA2.1 Rev. 2.1) by specifying bits TYPE2 to TYPE0 in CSnBCR (n = 5 and 6) to B'101.
In addition, bits SA1 and SA0 in CSnWCR (n = 5 and 6) assign the upper or lower 32 Mbytes of
each area to IC memory card or I/O card interface. For example, if bits SA1 and SA0 in CS5WCR
are set to 1 and cleared to 0, respectively, the upper 32 Mbytes of area 5 are used as IC memory
card interface and the lower 32 Mbytes are used as I/O card interface.
When the PCMCIA interface is used, the bus size must be specified as 8 bits or 16 bits using bits
BSZ1 and BSZ0 in CS5BCR or CS6BCR.
Figure 9.37 shows an example of a connection between this LSI and a PCMCIA card. To enable
hot swapping (insertion and removal of the PCMCIA card with the system power turned on), tri-
state buffers must be connected between the LSI and the PCMCIA card.
In the JEIDA and PCMCIA standards, operation in big endian mode is not clearly defined.
Consequently, the provided PCMCIA interface in big endian mode is available only for this LSI.
Rev. 4.00 Dec. 15, 2009 Page 344 of 1558
REJ09B0181-0400