SH7080_09 Datasheet, PDF (739/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 13 Port Output Enable (POE)
Section 13 Port Output Enable (POE)
The port output enable (POE) can be used to place the high-current pins (pins multiplexed with
TIOC3B, TIOC3D, TIOC4A, TIOC4B, TIOC4C, and TIOC4D in the MTU2 and TIOC3BS,
TIOC3DS, TIOC4AS, TIOC4BS, TIOC4CS, and TIOC4DS in the MTU2S) and the pins for
channel 0 of the MTU2 (pins multiplexed with TIOC0A, TIOC0B, TIOC0C, and TIOC0D) in
high-impedance state, depending on the change on POE0 to POE8 input pins and the output status
of the high-current pins, or by modifying register settings. It can also simultaneously generate
interrupt requests.
13.1 Features
• Each of the POE0 to POE8 input pins can be set for falling edge, Pφ/8 × 16, Pφ/16 × 16, or
Pφ/128 × 16 low-level sampling.
• High-current pins and the pins for channel 0 of the MTU2 can be placed in high-impedance
state by POE0 to POE8 pin falling-edge or low-level sampling.
• High-current pins can be placed in high-impedance state when the high-current pin output
levels are compared and simultaneous active-level output continues for one cycle or more.
• High-current pins and the pins for channel 0 of the MTU2 can be placed in high-impedance
state by modifying the POE register settings.
• Interrupts can be generated by input-level sampling or output-level comparison results.
The POE has input level detection circuits, output level comparison circuits, and a high-impedance
request/interrupt request generating circuit as shown in figure 13.1.
In addition to control by the POE, high-current pins can be placed in high-impedance state when
the oscillator stops or in software standby state. For details, refer to section 21.1.11, High-Current
Port Control Register (HCPCR), and appendix A, Pin States.
TIMMTU1A_020020030800
Rev. 4.00 Dec. 15, 2009 Page 679 of 1558
REJ09B0181-0400