SH7080_09 Datasheet, PDF (841/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 15 Serial Communication Interface (SCI)
15.5 SCI Interrupt Sources and DMAC/DTC
The SCI has four interrupt sources: transmit end (TEI), receive error (ERI), receive-data-full
(RXI), and transmit-data-empty (TXI) interrupt requests.
Table 15.17 shows the interrupt sources. The interrupt sources are enabled or disabled by means of
the TIE, RIE, and TEIE bits in SCSCR and the EIO bit in SCSPTR. A separate interrupt request is
sent to the interrupt controller for each of these interrupt sources.
When the TDRE flag in the serial status register (SCSSR) is set to 1, a TDR empty interrupt
request is generated. This request can be used to activate the direct memory access controller
(DMAC) or data transfer controller (DTC) to transfer data. The TDRE flag is automatically
cleared to 0 when data is written to the transmit data register (SCTDR) through the DMAC or
DTC.
When the RDRF flag in SCSSR is set to 1, an RDR full interrupt request is generated. This request
can be used to activate the DMAC or DTC to transfer data. The RDRF flag is automatically
cleared to 0 when data is read from the receive data register (SCRDR) through the DMAC or
DTC.
When the ORER, FER, or PER flag in SCSSR is set to 1, an ERI interrupt request is generated.
This request cannot be used to activate the DMAC or DTC.
It is possible to disable generation of RXI interrupt requests and allow only ERI interrupt requests
to be generated during data reception processing. To accomplish this, set the RIE bit to 1 and the
EIO bit in SCSPTR to 1. Note that setting the EIO bit to 1 will prevent the DMAC or DTC from
transferring received data because no ERI interrupt requests are generated.
When the TEND flag in SCSSR is set to 1, a TEI interrupt request is generated. This request
cannot be used to activate the DMAC or DTC.
The TXI interrupt indicates that transmit data can be written, and the TEI interrupt indicates that
transmission has been completed.
Rev. 4.00 Dec. 15, 2009 Page 781 of 1558
REJ09B0181-0400