SH7080_09 Datasheet, PDF (151/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 5 Exception Handling
5.2 Resets
5.2.1 Types of Resets
Resets have priority over any exception source. There are two types of resets: power-on resets and
manual resets. As table 5.5 shows, both types of resets initialize the internal status of the CPU. In
power-on resets, all registers of the on-chip peripheral modules are initialized; in manual resets,
they are not.
Table 5.5 Reset Status
Conditions for Transition to
Reset State
Type
Power-on reset
Manual reset
RES
Low
High
High
WDT
Overflow
MRES
⎯
⎯
Overflow
High
Not overflowed Low
CPU, INTC
Initialized
Initialized
Initialized
Internal State
On-Chip
Peripheral
Module
POE, PFC,
I/O Port
Initialized Initialized
Initialized Initialized
Not initialized Not initialized
5.2.2 Power-On Reset
Power-On Reset by RES Pin: When the RES pin is driven low, this LSI enters the power-on
reset state. To reliably reset this LSI, the RES pin should be kept low for at least the oscillation
settling time when applying the power or when in standby mode (when the clock is halted) or at
least 20 tcyc when the clock is operating. During the power-on reset state, CPU internal states and
all registers of on-chip peripheral modules are initialized. See appendix A, Pin States, for the
status of individual pins during power-on reset mode.
In the power-on reset state, power-on reset exception handling starts when driving the RES pin
high after driving the pin low for the given time. The CPU operates as follows:
1. The initial value (execution start address) of the program counter (PC) is fetched from the
exception handling vector table.
2. The initial value of the stack pointer (SP) is fetched from the exception handling vector table.
3. The vector base register (VBR) is cleared to H'00000000 and the interrupt mask bits (I3 to I0)
of the status register (SR) are set to H'F (B'1111).
4. The values fetched from the exception handling vector table are set in PC and SP, then the
program starts.
Rev. 4.00 Dec. 15, 2009 Page 91 of 1558
REJ09B0181-0400