SH7080_09 Datasheet, PDF (389/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 9 Bus State Controller (BSC)
CK
A25 to A0
A12/A11*¹
CSn
Tnop Tc1
RASL, RASU
CASL, CASU
RDWR
DQMxx
D31 to D0
BS
DACKn*²
Notes: 1. Address pin to be connected to pin A10 of SDRAM.
2. The waveform for DACKn is when active low is specified.
Figure 9.26 Single Write Timing (Bank Active, Same Row Address)
Rev. 4.00 Dec. 15, 2009 Page 329 of 1558
REJ09B0181-0400