SH7080_09 Datasheet, PDF (346/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 9 Bus State Controller (BSC)
Table 9.18 16-Bit External Device Access and Data Alignment
Operation
Byte access at 0
D31 to
D24
⎯
Byte access at 1 ⎯
Byte access at 2 ⎯
Byte access at 3 ⎯
Word access at 0 ⎯
Word access at 2 ⎯
Longword
access
at 0
1st time ⎯
at 0
2nd time ⎯
at 2
Data Bus
Strobe Signals
D23 to
D16
D15 to
D8
D7 to
D0
WRHH, WRHL, WRH, WRL,
DQMUU DQMUL DQMLU DQMLL
⎯
Data 7 to ⎯
⎯
⎯
Assert ⎯
Data 0
⎯
⎯
Data 7 to ⎯
⎯
⎯
Assert
Data 0
⎯
Data 7 to ⎯
⎯
⎯
Assert ⎯
Data 0
⎯
⎯
Data 7 to ⎯
⎯
⎯
Assert
Data 0
⎯
Data 15 to Data 7 to ⎯
⎯
Assert Assert
Data 8 Data 0
⎯
Data 15 to Data 7 to ⎯
⎯
Assert Assert
Data 8 Data 0
⎯
Data 31 to Data 23 to ⎯
⎯
Assert Assert
Data 24 Data 16
⎯
Data 15 to Data 7 to ⎯
⎯
Assert Assert
Data 8 Data 0
Rev. 4.00 Dec. 15, 2009 Page 286 of 1558
REJ09B0181-0400