SH7080_09 Datasheet, PDF (847/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 15 Serial Communication Interface (SCI)
15.7.6 Note on Using DMAC or DTC
When the external clock source is used for the clock for synchronization, input the external clock
after waiting for five or more cycles of the peripheral operating clock after SCTDR is modified
through the DMAC or DTC. If a transmit clock is input within four cycles after SCTDR is
modified, a malfunction may occur (figure 15.22).
SCK
t
TDRE
TXD
D0
D1
D2
D3
D4
D5
D6
D7
Note: When using the external clock, t must be set to larger than 4 cycles.
Figure 15.22 Example of Clock Synchronous Transfer Using DMAC or DTC
When data is written to SCTDR by activating the DMAC or DTC by a TXI interrupt, the TEND
flag value becomes undefined. In this case, do not use the TEND flag as the transmit end flag.
15.7.7 Note on Using External Clock in Clock Synchronous Mode
TE and RE must be set to 1 after waiting for four or more cycles of the peripheral operating clock
after the SCK external clock is changed from 0 to 1.
TE and RE must be set to 1 only while the SCK external clock is 1.
15.7.8 Module Standby Mode Setting
SCI operation can be disabled or enabled using the standby control register. The initial setting is
for SCI operation to be halted. Register access is enabled by clearing module standby mode. For
details, refer to section 26, Power-Down Modes.
Rev. 4.00 Dec. 15, 2009 Page 787 of 1558
REJ09B0181-0400