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| SH7080_09 Datasheet, PDF (1462/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family | |||
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Section 27 List of Registers
Register
Abbreviation
Power-on reset Manual reset
Software
Standby
Deep Software Module
Standby
Standby
Sleep
BARA
Initialized
Retained
Retained
Initialized
Initialized
Retained
BAMRA
Initialized
Retained
Retained
Initialized
Initialized
Retained
BBRA
BDRA*4
BDMRA*4
Initialized
Initialized
Initialized
Retained
Retained
Retained
Retained
Retained
Retained
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Retained
Retained
Retained
BARB
Initialized
Retained
Retained
Initialized
Initialized
Retained
BAMRB
Initialized
Retained
Retained
Initialized
Initialized
Retained
BBRB
Initialized
Retained
Retained
Initialized
Initialized
Retained
BDRB*4
BDMRB*4
Initialized
Initialized
Retained
Retained
Retained
Retained
Initialized
Initialized
Initialized
Initialized
Retained
Retained
BRCR
Initialized
Retained
Retained
Initialized
Initialized
Retained
BRSR*4
Initialized
Initialized
Retained
Initialized
Initialized
Retained
BRDR*4
Initialized
Initialized
Retained
Initialized
Initialized
Retained
BETR*4
Initialized
Retained
Retained
Initialized
Initialized
Notes: 1. Not initialized by a WDT power-on reset.
2. The OSCSTOP bit is not initialized by a WDT power-on reset.
3. The OSCSTOP bit is initialized.
4. Only in F-ZTAT version.
Retained
Module
UBC
Rev. 4.00 Dec. 15, 2009 Page 1402 of 1558
REJ09B0181-0400
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