SH7080_09 Datasheet, PDF (251/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 8 Data Transfer Controller (DTC)
Table 8.4 DTC Transfer Conditions (Chain Transfer Conditions Included)
1st Transfer
2nd Transfer
Transfer
Transfer
Transfer
Mode
CHNE CHNS RCHNE DISEL Counter*¹ CHNE CHNS RCHNE DISEL Counter*¹ DTC Transfer
Normal 0
⎯
⎯
0
Not 0
⎯
⎯
⎯
⎯
⎯
Ends at 1st
transfer
0
⎯
⎯
0
0
0
⎯
⎯
1
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Ends at 1st
transfer
Interrupt request
to CPU
1
0
⎯
⎯
⎯
0
⎯
⎯
0
Not 0
Ends at 2nd
transfer
0
⎯
⎯
0
0
0
⎯
⎯
1
⎯
Ends at 2nd
transfer
Interrupt request
to CPU
1
1
⎯
0
Not 0
⎯
⎯
⎯
⎯
⎯
Ends at 1st
transfer
1
1
⎯
1
Not 0
⎯
⎯
⎯
⎯
⎯
Ends at 1st
transfer
Interrupt request
to CPU
1
1
⎯
⎯
0
0
⎯
⎯
0
Not 0
Ends at 2nd
transfer
0
⎯
⎯
0
0
0
⎯
⎯
1
⎯
Ends at 2nd
transfer
Interrupt request
to CPU
Rev. 4.00 Dec. 15, 2009 Page 191 of 1558
REJ09B0181-0400