SH7080_09 Datasheet, PDF (494/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
11.3 Register Descriptions
The MTU2 has the following registers. For details on register addresses and register states during
each process, refer to section 27, List of Registers. To distinguish registers in each channel, an
underscore and the channel number are added as a suffix to the register name; TCR for channel 0
is expressed as TCR_0.
Table 11.3 Register Configuration
Register Name
Abbrevia-
tion
Timer control register_3
TCR_3
Timer control register_4
TCR_4
Timer mode register_3
TMDR_3
Timer mode register_4
TMDR_4
Timer I/O control register H_3 TIORH_3
Timer I/O control register L_3 TIORL_3
Timer I/O control register H_4 TIORH_4
Timer I/O control register L_4 TIORL_4
Timer interrupt enable
register_3
TIER_3
Timer interrupt enable
register_4
TIER_4
Timer output master enable
register
TOER
Timer gate control register
TGCR
Timer output control register 1 TOCR1
Timer output control register 2 TOCR2
Timer counter_3
TCNT_3
Timer counter_4
TCNT_4
Timer cycle data register
TCDR
Timer dead time data register TDDR
Timer general register A_3
TGRA_3
Timer general register B_3 TGRB_3
Timer general register A_4 TGRA_4
Timer general register B_4 TGRB_4
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value Address
H'00
H'FFFFC200
H'00
H'FFFFC201
H'00
H'FFFFC202
H'00
H'FFFFC203
H'00
H'FFFFC204
H'00
H'FFFFC205
H'00
H'FFFFC206
H'00
H'FFFFC207
H'00
H'FFFFC208
H'00
H'FFFFC209
H'C0
H'FFFFC20A
H'80
H'00
H'00
H'0000
H'0000
H'FFFF
H'FFFF
H'FFFF
H'FFFF
H'FFFF
H'FFFF
H'FFFFC20D
H'FFFFC20E
H'FFFFC20F
H'FFFFC210
H'FFFFC212
H'FFFFC214
H'FFFFC216
H'FFFFC218
H'FFFFC21A
H'FFFFC21C
H'FFFFC21E
Access Size
8, 16, 32
8
8, 16
8
8, 16, 32
8
8, 16
8
8, 16
8
8
8
8, 16
8
16, 32
16
16, 32
16
16, 32
16
16, 32
16
Rev. 4.00 Dec. 15, 2009 Page 434 of 1558
REJ09B0181-0400