SH7080_09 Datasheet, PDF (674/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Timing for Counter Clearing by Compare Match/Input Capture: Figures 11.100 and 11.101
show the timing when counter clearing on compare match is specified, and figure 11.102 shows
the timing when counter clearing on input capture is specified.
MPφ
Compare
match signal
Counter
clear signal
TCNT
N
H'0000
TGR
N
Figure 11.100 Counter Clear Timing (Compare Match) (Channels 0 to 4)
MPφ
Compare
match signal
Counter
clear signal
TCNT
N-1
H'0000
TGR
N
Figure 11.101 Counter Clear Timing (Compare Match) (Channel 5)
MPφ
Input capture
signal
Counter clear
signal
TCNT
N
H'0000
TGR
N
Figure 11.102 Counter Clear Timing (Input Capture) (Channels 0 to 5)
Rev. 4.00 Dec. 15, 2009 Page 614 of 1558
REJ09B0181-0400