SH7080_09 Datasheet, PDF (169/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 6 Interrupt Controller (INTC)
6.3.1 Interrupt Control Register 0 (ICR0)
ICR0 is a 16-bit register that sets the input signal detection mode of the external interrupt input pin
NMI and indicates the input signal level on the NMI pin.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
NMIL -
-
-
-
-
- NMIE -
-
-
-
-
-
-
-
Initial value: *
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R R/W R
R
R
R
R
R
R
R
Note: * The initial value is 1 when the level on the NMI pin is high, and 0 when the level on the pin is low.
Initial
Bit
Bit Name Value
15
NMIL
*
14 to 9 ⎯
All 0
8
NMIE
0
7 to 0 ⎯
All 0
R/W Description
R
NMI Input Level
Indicates the state of the signal input to the NMI pin.
This bit can be read to determine the NMI pin level. This
bit cannot be modified.
0: State of the NMI input is low
1: State of the NMI input is high
R
Reserved
These bits are always read as 0. The write value should
always be 0.
R/W NMI Edge Select
0: Interrupt request is detected on the falling edge of the
NMI input
1: Interrupt request is detected on the rising edge of the
NMI input
R
Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 4.00 Dec. 15, 2009 Page 109 of 1558
REJ09B0181-0400