SH7080_09 Datasheet, PDF (633/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
TGRA_3
TCDR
Synchronous clearing
Bit WRE = 1
TGRB_3
TCNT_3
(MTU2)
TCNT_4
(MTU2)
TDDR
H'0000
Positive phase
Negative phase
Output waveform is active-low.
Figure 11.58 Example of Synchronous Clearing in Dead Time during Up-Counting
(Timing (3) in Figure 11.56; Bit WRE of TWCR in MTU2 is 1)
TGRA_3
TCDR
Synchronous clearing
Bit WRE = 1
TGRB_3
TCNT_3
(MTU2)
TCNT_4
(MTU2)
TDDR
H'0000
Positive phase
Negative phase
Output waveform is active-low.
Figure 11.59 Example of Synchronous Clearing in Interval Tb at Crest
(Timing (6) in Figure 11.56; Bit WRE of TWCR in MTU2 is 1)
Rev. 4.00 Dec. 15, 2009 Page 573 of 1558
REJ09B0181-0400