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| SH7080_09 Datasheet, PDF (1481/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family | |||
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CK
A29 to A0
CSn
RDWR
RD
Read
D31 to D0
WRxx
Write
D31 to D0
BS
DACKn*, TENDn*
T1
tAD1
tCSD
tAS
tCSS
Section 28 Electrical Characteristics
T2
tAD1
tCSD
tRWD
tRWD
tRSD
tACC
tOE
tRSD
tCSH
tAH
tRDS1
tRDH1
tWSD1
tWDD1
tWSD1
tCSH
tAH
tWRH
tWDH1
tBSD
tDACD
tBSD
tDACD
Note: * The waveform for DACKn and TENDn is when active low is specified.
Figure 28.11 Basic Bus Timing for Normal Space (No Wait)
Rev. 4.00 Dec. 15, 2009 Page 1421 of 1558
REJ09B0181-0400
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