SH7080_09 Datasheet, PDF (680/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
TCFV Flag/TCFU Flag Setting Timing: Figure 11.113 shows the timing for setting of the TCFV
flag in TSR on overflow, and TCIV interrupt request signal timing.
Figure 11.114 shows the timing for setting of the TCFU flag in TSR on underflow, and TCIU
interrupt request signal timing.
MPφ, Pφ
TCNT input
clock
TCNT
(overflow)
Overflow
signal
TCFV flag
H'FFFF
H'0000
TCIV interrupt
Figure 11.113 TCIV Interrupt Setting Timing
MPφ, Pφ
TCNT
input clock
TCNT
(underflow)
Underflow
signal
TCFU flag
H'0000
H'FFFF
TCIU interrupt
Figure 11.114 TCIU Interrupt Setting Timing
Rev. 4.00 Dec. 15, 2009 Page 620 of 1558
REJ09B0181-0400