SH7080_09 Datasheet, PDF (865/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 16 Serial Communication Interface with FIFO (SCIF)
Initial
Bit
Bit Name value R/W Description
5
TDFE
1
R/(W)* Transmit FIFO Data Empty
Indicates that data has been transferred from the
transmit FIFO data register (SCFTDR) to the transmit
shift register (SCTSR), the number of data in
SCFTDR has become less than the transmission
trigger number specified by the TTRG1 and TTRG0
bits in the FIFO control register (SCFCR), and writing
of transmit data to SCFTDR is enabled.
0: The number of transmit data written to SCFTDR is
greater than the specified transmission trigger
number
[Clearing conditions]
• TDFE is cleared to 0 when data exceeding the
specified transmission trigger number is written to
SCFTDR after 1 is read from the TDFE bit and
then 0 is written
• TDFE is cleared to 0 when data exceeding the
specified transmission trigger number is written to
SCFTDR by using the DTC
1: The number of transmit data in SCFTDR is less
than or equal to the specified transmission trigger
number*
[Setting conditions]
• TDFE is set to 1 by a power-on reset
• TDFE is set to 1 when the number of transmit data
in SCFTDR becomes less than or equal to the
specified transmission trigger number as a result
of transmission
Note: * Since SCFTDR is a 16-byte FIFO register,
the maximum number of data that can be
written when TDFE is 1 is "16 minus the
specified transmission trigger number". If an
attempt is made to write additional data, the
data is ignored. The number of data in
SCFTDR is indicated by the upper 8 bits of
SCFDR.
Rev. 4.00 Dec. 15, 2009 Page 805 of 1558
REJ09B0181-0400