SH7080_09 Datasheet, PDF (291/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 9 Bus State Controller (BSC)
Address
Area
Memory Type
Capacity
Bus
Width
H'08000000 to CS2 space
H'0BFFFFFF
Normal space
SRAM with byte selection
SDRAM
64 Mbytes 8 or 16
bits*²
H'0C000000 to CS3 space
H'0FFFFFFF
Normal space
SRAM with byte selection
SDRAM
64 Mbytes 8 or 16
bits*²
H'10000000 to CS4 space
H'13FFFFFF
Normal space
SRAM with byte selection
Burst ROM (asynchronous)
64 Mbytes
8 or 16
bits*²
H'14000000 to CS5 space
H'17FFFFFF
Normal space
SRAM with byte selection
MPX-I/O
64 Mbytes 8 or 16
bits*²
H'18000000 to CS6 space
H'1BFFFFFF
Normal space
SRAM with byte selection
64 Mbytes 8 or 16
bits*²
H'1C000000 to CS7 space
H'1FFFFFFF
Normal space
SRAM with byte selection
64 Mbytes 8 or 16
bits*²
H'20000000 to Reserved
H'FFF7FFFF
H'FFF80000 to SDRAM mode setting
H'FFF9FFFF ^space
H'FFFA0000 to Reserved
H'FFFF3FFF
H'FFFF4000 to On-chip RAM
H'FFFFBFFF
32 Kbytes 32 bits
H'FFFFC000 to On-chip peripheral
H'FFFFFFFF ^modules
16 Kbytes
8 or 16
bits
Notes: Do not access the reserved area. If the reserved area is accessed, the correct operation
cannot be guaranteed.
1. The bus width is selected by the mode pins.
2. The bus width is selected by the register setting.
Rev. 4.00 Dec. 15, 2009 Page 231 of 1558
REJ09B0181-0400