SH7785 Datasheet, PDF (985/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

19. Display Unit (DU)
TV (sync signal generation circuit): Master
Clock HSYNC VSYNC Field signal
R,G,B
DCLKIN HSYNC VSYNC ODDF
This LSI: Slave
DR5-DR0
DG5-DG0
DB5-DB0
CDE
Input 2
Output
Input 1
Display
Switching between master
(input 2) and slave (input 1)
by CDE.
Figure 19.12 Signal Flow in TV Sync Mode
Sync Method Switching Mode: When switching from master mode into TV sync mode, or from
TV sync mode into master mode, when necessary this mode should be switched into first. Even if
a transition to this mode is not made first, switching of the synchronization method is possible.
In this mode, input/output pins connected to the display unit (DU) are for input, and so pin
collision can be avoided. Also, in this mode no display operation is performed, and the internal dot
clock is stopped, so that disorder in the input dot clock has no effect on display operation.
Rev.1.00 Jan. 10, 2008 Page 955 of 1658
REJ09B0261-0100