SH7785 Datasheet, PDF (616/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

13. PCI Controller (PCIC)
(26) PCI Power Management Control/Status Register (PCIPMCSR)
This register manages power management events (PME) of the PCI function. For details, see
section 3, PCI Power Management Interface in PCI Bus Power Management Interface
Specification Revision 1.1.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
PMES DSC
DSL
PME
EN
⎯
⎯
⎯
⎯
⎯
⎯
PS
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SH R/W: R R R R R R R R R R R R R R R/W R/W
PCI R/W: R R R R R R R R R R R R R R R/W R/W
Initial
Bit
Bit Name Value R/W
15
PMES
0
SH: R
PCI: R
14, 13 DSC
00
SH: R
PCI: R
12 to 9 DSL
0000 SH: R
PCI: R
8
PMEEN 0
SH: R
PCI: R
7 to 2 ⎯
All 0 SH: R
PCI: R
Description
PME Status
Indicates the state of the PME signal (not supported)
Note: The PCIC in this LSI dose not has the PME
pin.
Data Scale
These bits specify the scaling value of data field (not
supported)
Data Select
These bits specify the value output to the data field
(not supported)
PME Enable
Controls the PME output (not supported)
Note: The PCIC in this LSI dose not has the PME
pin.
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev.1.00 Jan. 10, 2008 Page 586 of 1658
REJ09B0261-0100