SH7785 Datasheet, PDF (20/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

19.3.26 Color Palette 4 Transparent Color Register (CP4TR) ........................................ 887
19.3.27 Display Off Mode Output Register (DOOR)...................................................... 890
19.3.28 Color Detection Register (CDER) ...................................................................... 891
19.3.29 Background Plane Output Register (BPOR)....................................................... 892
19.3.30 Raster Interrupt Offset Register (RINTOFSR) ................................................... 894
19.3.31 Plane n Mode Register (PnMR) (n = 1 to 6) ....................................................... 895
19.3.32 Plane n Memory Width Register (PnMWR) (n = 1 to 6).................................... 898
19.3.33 Plane n Blending Ratio Register (PnALPHAR) (n = 1 to 6) .............................. 899
19.3.34 Plane n Display Size X Register (PnDSXR) (n = 1 to 6).................................... 901
19.3.35 Plane n Display Size Y Register (PnDSYR) (n = 1 to 6).................................... 902
19.3.36 Plane n Display Position X Register (PnDPXR) (n = 1 to 6).............................. 903
19.3.37 Plane n Display Position Y Register (PnDPYR) (n = 1 to 6).............................. 904
19.3.38 Plane n Display Area Start Address 0 Register (PnDSA0R) (n = 1 to 6) ........... 905
19.3.39 Plane n Display Area Start Address 1 Register (PnDSA1R) (n = 1 to 6) ........... 906
19.3.40 Plane n Start Position X Register (PnSPXR) (n = 1 to 6) ................................... 907
19.3.41 Plane n Start Position Y Register (PnSPYR) (n = 1 to 6) ................................... 908
19.3.42 Plane n Wrap Around Start Position Register (PnWASPR) (n = 1 to 6) ............ 909
19.3.43 Plane n Wrap Around Memory Width Register (PnWAMWR) (n = 1 to 6) ...... 910
19.3.44 Plane n Blinking Time Register (PnBTR) (n = 1 to 6) ....................................... 911
19.3.45 Plane n Transparent Color 1 Register (PnTC1R) (n = 1 to 6)............................. 912
19.3.46 Plane n Transparent Color 2 Register (PnTC2R) (n = 1 to 6)............................. 913
19.3.47 Plane n Memory Length Register (PnMLR) (n = 1 to 6).................................... 914
19.3.48 Color Palette 1 Register 000 to 255 (CP1_000R to CP1_255R) ........................ 915
19.3.49 Color Palette 2 Register 000 to 255 (CP2_000R to CP2_255R) ........................ 916
19.3.50 Color Palette 3 Register 000 to 255 (CP3_000R to CP3_255R) ........................ 918
19.3.51 Color Palette 4 Register 000 to 255 (CP4_000R to CP4_255R) ........................ 919
19.3.52 External Synchronization Control Register (ESCR)........................................... 921
19.3.53 Output Signal Timing Adjustment Register (OTAR) ......................................... 923
19.4 Operation ........................................................................................................................... 930
19.4.1 Configuration of Output Screen.......................................................................... 930
19.4.2 Display On/Off ................................................................................................... 933
19.4.3 Plane Parameter .................................................................................................. 934
19.4.4 Memory Allocation............................................................................................. 936
19.4.5 Input Display Data Format ................................................................................. 937
19.4.6 Output Data Format ............................................................................................ 940
19.4.7 Endian Conversion.............................................................................................. 940
19.4.8 Color Palettes...................................................................................................... 942
19.4.9 Superpositioning of Planes ................................................................................. 943
19.4.10 Display Contention ............................................................................................. 947
19.4.11 Blinking .............................................................................................................. 949
Rev.1.00 Jan. 10, 2008 Page xx of xxx
REJ09B0261-0100