SH7785 Datasheet, PDF (792/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

16. Watchdog Timer and Reset (WDT)
16.3 Register Descriptions
Table 16.2 shows the registers of the WDT module. Table 16.3 shows the register states in each
operating mode.
Table 16.2 Register Configuration
Register Name
Abbreviation R/W
Watchdog timer stop time register WDTST
R/W
Watchdog timer control/status
WDTCSR
R/W
register
Watchdog timer base stop time WDTBST
R/W
register
Watchdog timer counter
WDTCNT
R
Watchdog timer base counter
WDTBCNT R
P4 Address
Area 7
Address
Access Sync
Size Clock
H'FFCC 0000 H'1FCC 0000 32
Pck
H'FFCC 0004 H'1FCC 0004 32
Pck
H'FFCC 0008 H'1FCC 0008 32
Pck
H'FFCC 0010 H'1FCC 0010 32
Pck
H'FFCC 0018 H'1FCC 0018 32
Pck
Table 16.3 Register States in Each Operating Mode
Register Name
Power-on
Reset by
Abbreviation PRESET Pin
Watchdog timer stop time register WDTST
H'0000 0000
Watchdog timer control/status
register
WDTCSR
H'0000 0000
Watchdog timer base stop time
register
WDTBST
H'0000 0000
Watchdog timer counter
WDTCNT
H'0000 0000
Watchdog timer base counter
WDTBCNT H'0000 0000
Power-on
Reset by
WDT/H-UDI
Manual
Reset by
WDT/
Multiple
Exception
Retained
Retained
Retained
Retained
Retained
Retained
H'0000 0000 Retained
H'0000 0000 Retained
Sleep/Deep
Sleep Mode
by SLEEP
Instruction
Retained
Retained
Retained
Retained
Retained
Rev.1.00 Jan. 10, 2008 Page 762 of 1658
REJ09B0261-0100