SH7785 Datasheet, PDF (1247/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

24. Multimedia Card Interface (MMCIF)
• The end of the command sequence is detected by poling the BUSY flag in CSTR, by the data
transfer end interrupt (DTI) or pre-defined multiple block transfer end (BTI).
• Write the CMDOFF bit to 1 if a CRC error (CRCERI) or a command timeout error (CTERI)
occurs in the command response reception.
• Clear the FIFO by writing the CMDOFF bit to 1, when CRC error (CRCERI) and data timeout
error (DTERI) occurs in the read data reception.
Input/output pins
MMCCLK
MMCCMD
MMCDAT
CMDSTRT
(CMDSTART)
OPCR
(RD_CONTI)
(CMDOFF)
INTSTR0
(CMDI)
CMD17 (READ_SINGLE_BLOCK)
Command
Command response
Command
transmission
started
Read data
(CRPI)
(DTI)
(FFI)
CSTR
(CWRE)
(BUSY)
Single block read command execution sequence
(FIFO_FULL)
(REQ)
Figure 24.8 Example of Command Sequence for Commands with Read Data
(Block Size ≤ FIFO Size)
Rev.1.00 Jan. 10, 2008 Page 1217 of 1658
REJ09B0261-0100