SH7785 Datasheet, PDF (463/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Local Bus State Controller (LBSC)
CLKOUT
RD/FRAME
D63 to D0
CSn
R/W
Tm1 Tmd1w Tmd1 Tmd2 Tmd3 Tmd4
A
D0
D1
D2
D3
RDY
BS
DACKn
In this example, DACKn is active-high.
Figure 11.28 MPX Interface Timing 5
(Burst Read Cycle, IW = 0000, No External Wait, 64-Bit Bus Width, 32-Byte Data Transfer)
Rev.1.00 Jan. 10, 2008 Page 433 of 1658
REJ09B0261-0100