SH7785 Datasheet, PDF (1294/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

25. Audio Codec Interface (HAC)
Figure 25.1 shows a block diagram of the HAC.
HACn_SDIN
HACn_BITCLK
HACn_SDOUT
HACn_SYNC
HACn_RES
HAC receiver
Shift register for slot 1
Shift register for slot 2
Shift register for slot 3
Shift register for slot 4
Data[19:0]
Data[19:0]
Data[19:0]
Data[19:0]
Control signal
Internal bus interface (Reception)
CSAR RX buffer
CSDR RX buffer
PCML RX buffer
Data[31:0]
PCMR RX buffer
DMA control
DMA request
Request signal
for slots 3 and 4
Bit control signal
Interrupt request
HAC transmitter
Shift register for slot 1
Shift register for slot 2
Shift register for slot 3
Shift register for slot 4
Data[19:0]
Internal bus interface (Transmission)
CSAR TX buffer
Data[19:0]
Data[19:0]
CSDR TX buffer
PCML TX buffer
Data[31:0]
Data[19:0]
Control signal
PCMR TX buffer
DMA control
DMA request
Note: n = 0 to 1
Interrupt request
Figure 25.1 Block Diagram
Rev.1.00 Jan. 10, 2008 Page 1264 of 1658
REJ09B0261-0100