SH7785 Datasheet, PDF (418/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Local Bus State Controller (LBSC)
Table 11.6 64-Bit External Device/Big Endian Access and Data Alignment (1)
Operation
Data Bus
Access
D63 to
Size
Address No. D56
D55 to
D48
D47 to
D40
D39 to
D32
D31 to
D24
D23 to
D16
D15 to D8 D7 to D0
Byte
8n
1 Data 7 to 0 ⎯
⎯
⎯
⎯
⎯
⎯
⎯
8n + 1 1 ⎯
Data 7 to 0 ⎯
⎯
⎯
⎯
⎯
⎯
8n + 2 1 ⎯
⎯
Data 7 to 0 ⎯
⎯
⎯
⎯
⎯
8n + 3 1 ⎯
⎯
⎯
Data 7 to 0 ⎯
⎯
⎯
⎯
8n + 4 1 ⎯
⎯
⎯
⎯
Data 7 to 0 ⎯
⎯
⎯
8n + 5 1 ⎯
⎯
⎯
⎯
⎯
Data 7 to 0 ⎯
⎯
8n + 6 1 ⎯
⎯
⎯
⎯
⎯
⎯
Data 7 to 0 ⎯
8n + 7 1 ⎯
⎯
⎯
⎯
⎯
⎯
⎯
Data 7 to 0
Word
8n
1 Data
Data
⎯
⎯
⎯
⎯
⎯
⎯
15 to 8 7 to 0
8n + 2 1 ⎯
⎯
Data
Data
⎯
⎯
⎯
⎯
15 to 8 7 to 0
8n + 4 1 ⎯
⎯
⎯
⎯
Data
Data
⎯
⎯
15 to 8 7 to 0
8n + 6 1 ⎯
⎯
⎯
⎯
⎯
⎯
Data
Data
15 to 8 7 to 0
Longword 8n
1 Data
Data
Data
Data
⎯
⎯
⎯
⎯
31 to 24 23 to 16 15 to 8 7 to 0
8n + 4 1 ⎯
⎯
⎯
⎯
Data
Data
Data
Data
31 to 24 23 to 16 15 to 8 7 to 0
32 Bytes* 8n
1 Data
Data
Data
Data
Data
Data
Data
Data
63 to 56 55 to 48 47 to 40 39 to 32 31 to 24 23 to 16 15 to 8 7 to 0
8n + 8 2
Data 127 Data 119 Data 111 Data 103 Data 95 to Data 87 to Data 79 to Data 71 to
to 120
to 112
to 104
to 96
88
80
72
64
8n + 16 3
Data 191 Data 183 Data 175 Data 167 Data 159 Data 151 Data 143 Data 135
to 184
to 176
to 168
to 160
to 152
to 144
to 136
to 128
Note:
8n + 24 4
Data 255 Data 247 Data 239 Data 231 Data 223 Data 215 Data 207 Data 199
to 248
to 240
to 232
to 224
to 216
to 208
to 200
to 192
* This table shows an example when the access start address is on the 32-byte
boundary. When the start address is not on the 32-byte boundary, accesses are
performed up to immediately before the 32-byte boundary and the address is wrapped
around to the previous 32-byte boundary.
Rev.1.00 Jan. 10, 2008 Page 388 of 1658
REJ09B0261-0100