SH7785 Datasheet, PDF (1233/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

24. Multimedia Card Interface (MMCIF)
24.3.14 Response Registers 0 to 16, D (RSPR0 to RSPR16, RSPRD)
RSPR0 to RSPR16 are command response registers, which are seventeen 8-bit registers. RSPRD
is an 8-bit CRC status register.
The number of command response bytes differs according to the command. The number of
command response bytes can be specified by RSPTYR in the MMCIF. The command response is
shifted-in from bit 0 in RSPR16, and shifted to the number of command response bytes × 8 bits.
Table 24.6 summarizes the correspondence between the number of command response bytes and
valid RSPR register.
Table 24.6 Correspondence between Command Response Byte Number and RSPR
RSPR registers
RSPR0
RSPR1
RSPR2
RSPR3
RSPR4
RSPR5
RSPR6
RSPR7
RSPR8
RSPR9
RSPR10
RSPR11
RSPR12
RSPR13
RSPR14
RSPR15
RSPR16
MMC Mode Response
6 bytes (R1, R1b, R3, R4, R5)
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
1st byte
2nd byte
3rd byte
4th byte
5th byte
6th byte
17 bytes (R2)
1st byte
2nd byte
3rd byte
4th byte
5th byte
6th byte
7th byte
8th byte
9th byte
10th byte
11th byte
12th byte
13th byte
14th byte
15th byte
16th byte
17th byte
RSPR0 to RSPR16 are simple shift registers. A command response that has been shifted in is not
automatically cleared, and it is continuously shifted until it is shifted out from bit 7 in RSPR0. To
clear unnecessary bytes to H'00, write an arbitrary value to each RSPR.
Rev.1.00 Jan. 10, 2008 Page 1203 of 1658
REJ09B0261-0100