SH7785 Datasheet, PDF (907/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

19. Display Unit (DU)
19.3.22 DE Signal Width Register (DEWR)
The DE signal width register (DEWR) sets the high-level width of the DE signal. The value is
retained during power-on reset and manual reset.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
————————————————
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Internal update:
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—————
DEW
Initial value: 0
0
0
0
0 ———————————
R/W: R R R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Internal update:
OOOOOOOOOOO
Initial
Bit
Bit Name Value R/W
31 to 11 ⎯
All 0
R
10 to 0 DEW
Undefined R/W
Internal
Update Description
⎯
Reserved
These bits are always read as 0. The write value
should always be 0.
Yes
DE Signal Width
The high-level width of the DE signal should be
set in dot clock units.
If the HSYNC signal falls while the DE signal is
at high level, the DE signal also falls.
Rev.1.00 Jan. 10, 2008 Page 877 of 1658
REJ09B0261-0100