SH7785 Datasheet, PDF (331/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Interrupt Controller (INTC)
Table 10.5 Interrupt Request Sources and INT2PRI0 to INT2PRI9
Bits
Register
28 to 24
20 to 16
12 to 8
4 to 0
INT2PRI0
TMU channel 0 TMU channel 1 TMU channel 2 TMU channel 2
input capture
INT2PRI1
TMU channel 3 TMU channel 4 TMU channel 5 Reserved*
INT2PRI2
SCIF channel 0 SCIF channel 1 SCIF channel 2 SCIF channel 3
INT2PRI3
SCIF channel 4 SCIF channel 5 WDT
Reserved*
INT2PRI4
H-UDI
DMAC (0)
DMAC (1)
Reserved*
INT2PRI5
HAC channel 0 HAC channel 1 PCIC (0)
PCIC (1)
INT2PRI6
PCIC (2)
PCIC (3)
PCIC (4)
PCIC (5)
INT2PRI7
SIOF
HSPI
MMCIF
Reserved*
INT2PRI8
FLCTL
GPIO
SSI channel 0 SSI channel 1
INT2PRI9
DU
GDTA
Reserved*
Reserved*
Notes: The larger the value is, the higher the priority is. If the value is set to H'00 or H'01, the
request is masked. For details, see table 10.1, Interrupt Sources.
* Reserved bits are always read as 0. The write value should always be 0.
Rev.1.00 Jan. 10, 2008 Page 301 of 1658
REJ09B0261-0100