SH7785 Datasheet, PDF (412/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Local Bus State Controller (LBSC)
11.4.5 CSn PCMCIA Control Register (CSnPCR)
CSnPCR is a 32-bit readable/writable register that specifies the timing for the PCMCIA interface
connected to area n (CSnPCR, n = 5 or 6), the space property, and the assert/negate timing for the
OE and WE signals. Also, areas 5 and 6 in CSnPCR can be set for the first half and second half
individually. The first half of area 5 is allocated from H'1400 0000 to H'15FF FFFF, and the
second half of area 5 is allocated from H'1600 0000 to H'17FF FFFF. The first half of area 6 is
allocated from H'1800 0000 to H'19FF FFFF, and the second half of area 6 is allocated from
H'1A00 0000 to H'1BFF FFFF (these addresses are the local bus address). The pulse widths of OE
and WE assertion for the first half of area 5 and 6 are set by the IW bits in CSnWCR.
CSnPCR is initialized to H'7700 0000 by a power-on reset, but it is not initialized by a manual
reset.
BIt: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
⎯
SAA
⎯
SAB
PCWA
PCWB
PCIW
Initial value: 0
1
1
1
0
1
1
1
0
0
0
0
0
0
0
0
R/W: R R/W R/W R/W R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
BIt: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
⎯
TEDA
⎯
TEDB
⎯
TEHA
⎯
TEHB
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W
Bit
Bit Name
31
⎯
30 to 28 SAA
Initial
Value
0
111
R/W
R
R/W
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
Space Property A
These bits specify the space property of PCMCIA
connected to the first half of the area.
000: ATA complement mode
001: Dynamic I/O bus sizing
010: 8-bit I/O space
011: 16-bit I/O space
100: 8-bit common memory
101: 16-bit common memory
110: 8-bit attribute memory
111: 16-bit attribute memory
Rev.1.00 Jan. 10, 2008 Page 382 of 1658
REJ09B0261-0100