SH7785 Datasheet, PDF (490/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

12. DDR2-SDRAM Interface (DBSC2)
12.2 Input/Output Pins
Table 12.1 shows the pin configuration of the DBSC2.
Table 12.1 Pin Configuration of the DBSC2
Pin Name
MCK0
MCK0
Function
DDR2-SDRAM clock 0
DDR2-SDRAM clock 0
I/O
Output
Output
MCK1
MCK1
DDR2-SDRAM clock 1
DDR2-SDRAM clock 1
Output
Output
MCKE
Clock enable
MCS
MWE
MRAS
MCAS
Chip select
Write enable
Row address strobe
Column address strobe
MA14 to MA0 Addresses
MBA2, MBA1, Bank active
MBA0
MDQ31 to
MDQ0
Data
MDQS3 to
MDQS0
MDQS3 to
MDQS0
I/O data strobe
I/O data strobe
MDM3 to
MDM0
Data mask
MODT
ODT enable
MBKPRST Power backup reset
Output
Output
Output
Output
Output
Output
Output
I/O
I/O
I/O
Output
Output
Input
MVREF
Reference voltage input Input
Description
Clock output for the DDR2-SDRAM
Clock output for the DDR2-SDRAM or
MCK0 inverted clock output
Clock output for the DDR2-SDRAM
Clock output for the DDR2-SDRAM or
MCK1 inverted clock output
CKE output signal
Chip select output signal
Write enable output signal
Row address strobe output signal
Column address strobe output signal
Address output signals
Bank address output signal
Data I/O signals
Data strobe I/O signals
Data strobe I/O signals or MDQS3 to
MDQS0 inverted signals
Data mask output signals
ODT enable output signal to the SDRAM
Used in power backup mode.
When this pin is brought low level, the
MCKE pin is also pulled low.
Input reference voltage
Rev.1.00 Jan. 10, 2008 Page 460 of 1658
REJ09B0261-0100