SH7785 Datasheet, PDF (438/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Local Bus State Controller (LBSC)
CLKOUT
A25 to A0
CSn
R/W
RD
D31 to D0
(In reading)
WEn
D31 to D0
(In writing)
T1
Tw
T2
BS
RDY
DACKn
: Sampling Timing
In this example, DACKn is active-high. (The circle indicates the sampling timing.)
Figure 11.9 SRAM Interface Wait Timing (Software Wait Only)
Rev.1.00 Jan. 10, 2008 Page 408 of 1658
REJ09B0261-0100