SH7785 Datasheet, PDF (1452/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

28. General Purpose I/O Ports (GPIO)
28.2.21 Port E Data Register (PEDR)
PEDR is an 8-bit readable/writable register that stores port E data.
Bit:
Initial value:
R/W:
7
—
0
R/W
6
5
4
3
2
1
0
— PE5DT PE4DT PE3DT PE2DT PE1DT PE0DT
0
0
0
x
0
0
x
R/W R/W R/W R/W R/W R/W R/W
Initial
Bit
Bit Name value R/W Description
7 and 6 ⎯
All 0 R/W Reserved
These bits are always read as 0, and the write value
should always be 0.
5
PE5DT
0*
R/W These bits store output data of a pin which is used as a
4
PE4DT
0*
R/W ^{general-purpose output port. When the pin functions as}
a general-purpose output port, reading the port will read
3
PE3DT
Pin input R/W _{out the value of the corresponding bit of this register.}
2
PE2DT
0*
R/W When the pin functions as a general-purpose input port,
1
PE1DT
0*
R/W ^{reading the port will read out the status of the}
corresponding pin.
0
PE0DT
Pin input R/W
Note: * When the bus mode is set to the local bus or DU via the bus mode pins (MODE11 and
MODE12), the pin is initially used as a general-purpose input, and the pin status is read
from this register.
Rev.1.00 Jan. 10, 2008 Page 1422 of 1658
REJ09B0261-0100