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SH7785 Datasheet, PDF (41/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer | |||
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1. Overview
Item
Features
Synchronized serial â¢
I/O with FIFO
â¢
(SIOF)
â¢
Number of channels: One (max.)
Supports full-duplex operation
Separate 64-byte (32 bits x 16) FIFOs for transmission and reception
⢠Supports the input and output of 8-/16-bit monaural and 16-bit
stereophonic audio data
⢠Method of synchronization selectable as frame synchronization pulses or
left/right channel switching
⢠Allows connection of linear, audio, A-law, or μ-Law CODEC chip
⢠Select an on-chip peripheral clock or input on an external pin as base for
the sampling-rate clock
⢠Maximum sampling rate: 48 kHz
⢠On-chip prescaler that uses the on-chip peripheral clock
Serial protocol
interface (HSPI)
⢠Number of channels: One (max.)
⢠Supports full-duplex operation
⢠Master/slave mode
⢠Selectable bit rate generated by the on-chip baud-rate generator
Multimedia card
interface (MMCIF)
⢠Number of channels: One (max.)
⢠Supports a subset of version 3.1 of the multimedia card system
specification
⢠Supports MMC-mode operation
⢠Interfaces with MMCCLK output (transfer clock output), MMCCMD I/O
(command output/response input), and MMCDAT I/O (data I/O) pins
Audio codec
interface (HAC)
⢠Number of channels: Two (max.)
⢠Digital interface for audio codecs
⢠Supports transfer via slots 1 to 4
⢠Choice of 16- or 20-bit DMA transfer rates for transmission/reception
⢠Supports various sampling rates by adjusting the allocation of data to
slots
Rev.1.00 Jan. 10, 2008 Page 11 of 1658
REJ09B0261-0100
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