SH7785 Datasheet, PDF (898/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

19. Display Unit (DU)
19.3.13 Horizontal Cycle Register (HCR)
The horizontal cycle register (HCR) sets the horizontal scan cycle.(period). The value is retained
during power-on reset and manual reset.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
————————————————
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Internal update:
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—————
HC
Initial value: 0
0
0
0
0 ———————————
R/W: R R R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Internal update:
OOOOOOOOOOO
Initial
Bit
Bit Name Value R/W
31 to 11 ⎯
All 0
R
10 to 0 HC
Undefined R/W
Internal
Update Description
⎯
Reserved
These bits are always read as 0. The write value
should always be 0.
Yes
Horizontal Cycle
One horizontal scan period, including the
horizontal blanking interval, should be set in dot
clock units.
When in TV sync mode, this register should be
set so that the HSYNC period determined by this
register is the same as or greater than the
EXHSYNC period.
Rev.1.00 Jan. 10, 2008 Page 868 of 1658
REJ09B0261-0100