SH7785 Datasheet, PDF (343/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Interrupt Controller (INTC)
Initial
Bit Value R/W Source
Function
Description
18 0
17 0
16 0
15 0
14 0
R/W PCIC (4)
R/W PCIC (3)
R/W PCIC (2)
R/W PCIC (1)
R/W PCIC (0)
Clears the PCIINTD interrupt
masking
Clears the PCIINTC interrupt
masking
Clears the PCIINTB interrupt
masking
Clears the PCIINTA interrupt
masking
Clears the PCISERR interrupt
masking
Clears interrupt
masking for each on-
chip peripheral module
[When written]
0: Invalid
1: Clears interrupt
masking
[When read]
Always 0
13 0
R/W HAC channel 1 Clears the HAC channel 1 interrupt
masking
12 0
R/W HAC channel 0 Clears the HAC channel 0 interrupt
masking
11 0
R/W DMAC (1)
Clears DMAC channels 6 to 11
interrupt masking and address
error interrupt
10 0
R/W DMAC (0)
Clears DMAC channels 0 to 5
interrupt masking and address
error interrupt
90
R/W H-UDI
Clears H-UDI interrupt masking
80
R/W WDT
Clears the WDT interrupt masking
70
R/W SCIF channel 5 Clears SCIF channel 5 interrupt
masking
60
R/W SCIF channel 4 Clears SCIF channel 4 interrupt
masking
50
R/W SCIF channel 3 Clears SCIF channel 3 interrupt
masking
40
R/W SCIF channel 2 Clears SCIF channel 2 interrupt
masking
30
R/W SCIF channel 1 Clears SCIF channel 1 interrupt
masking
20
R/W SCIF channel 0 Clears SCIF channel 0 interrupt
masking
10
R/W TMU channels Clears TMU channel 3 to 5
3 to 5
interrupt masking
00
R/W TMU channels Clears TMU channel 0 to 2
0 to 2
interrupt masking
Rev.1.00 Jan. 10, 2008 Page 313 of 1658
REJ09B0261-0100