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SH7785 Datasheet, PDF (424/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer | |||
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11. Local Bus State Controller (LBSC)
Table 11.12 64-Bit External Device/Little Endian Access and Data Alignment (2)
Operation
Strobe Signal
Access
Size
Address No. WE7
WE6
WE5
WE4
WE3
WE2
WE1
WE0
Byte
8n
1â¯
â¯
â¯
â¯
â¯
â¯
â¯
Asserted
8n + 1 1 â¯
â¯
â¯
â¯
â¯
â¯
Asserted â¯
8n + 2 1 â¯
â¯
â¯
â¯
â¯
Asserted â¯
â¯
8n + 3 1 â¯
â¯
â¯
â¯
Asserted â¯
â¯
â¯
8n + 4 1 â¯
â¯
â¯
Asserted â¯
â¯
â¯
â¯
8n + 5 1 â¯
â¯
Asserted â¯
â¯
â¯
â¯
â¯
8n + 6 1 â¯
Asserted â¯
â¯
â¯
â¯
â¯
â¯
8n + 7 1 Asserted â¯
â¯
â¯
â¯
â¯
â¯
â¯
Word
8n
1â¯
â¯
â¯
â¯
â¯
â¯
Asserted Asserted
8n + 2 1 â¯
â¯
â¯
â¯
Asserted Asserted â¯
â¯
8n + 4 1 â¯
â¯
Asserted Asserted â¯
â¯
â¯
â¯
8n + 6 1 Asserted Asserted â¯
â¯
â¯
â¯
â¯
â¯
Longword 8n
1â¯
â¯
â¯
â¯
Asserted Asserted Asserted Asserted
8n + 4 1 Asserted Asserted Asserted Asserted â¯
â¯
â¯
â¯
32 Bytes* 8n
1 Asserted Asserted Asserted Asserted Asserted Asserted Asserted Asserted
8n + 8 2 Asserted Asserted Asserted Asserted Asserted Asserted Asserted Asserted
8n + 16 3 Asserted Asserted Asserted Asserted Asserted Asserted Asserted Asserted
Note:
8n + 24 4 Asserted Asserted Asserted Asserted Asserted Asserted Asserted Asserted
* This table shows an example when the access start address is on the 32-byte
boundary. When the start address is not on the 32-byte boundary, accesses are
performed up to immediately before the 32-byte boundary and the address is wrapped
around to the previous 32-byte boundary.
Rev.1.00 Jan. 10, 2008 Page 394 of 1658
REJ09B0261-0100
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