SH7785 Datasheet, PDF (85/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

3. Instruction Set
Instruction
Operation
Instruction Code
Privileged T Bit New
MOVT
Rn
T → Rn
0000nnnn00101001 —
——
SWAP.B Rm,Rn
Rm → swap lower 2 bytes 0110nnnnmmmm1000 —
→ Rn
——
SWAP.W Rm,Rn
Rm → swap upper/lower
words → Rn
0110nnnnmmmm1001 —
——
XTRCT
Rm,Rn
Rm:Rn middle 32 bits → Rn 0010nnnnmmmm1101 —
——
Note: * The assembler of Renesas uses the value after scaling (×1, ×2, or ×4) as the
displacement (disp).
Table 3.5 Arithmetic Operation Instructions
Instruction
Operation
ADD
Rm,Rn Rn + Rm → Rn
ADD
#imm,Rn Rn + imm → Rn
ADDC
Rm,Rn
Rn + Rm + T → Rn,
carry → T
ADDV
Rm,Rn
Rn + Rm → Rn,
overflow → T
CMP/EQ #imm,R0 When R0 = imm, 1 → T
Otherwise, 0 → T
CMP/EQ Rm,Rn
When Rn = Rm, 1 → T
Otherwise, 0 → T
CMP/HS Rm,Rn
When Rn ≥ Rm (unsigned),
1→T
Otherwise, 0 → T
CMP/GE Rm,Rn
When Rn ≥ Rm (signed),
1→T
Otherwise, 0 → T
CMP/HI
Rm,Rn
When Rn > Rm (unsigned),
1→T
Otherwise, 0 → T
CMP/GT Rm,Rn
When Rn > Rm (signed),
1→T
Otherwise, 0 → T
CMP/PZ Rn
When Rn ≥ 0, 1 → T
Otherwise, 0 → T
CMP/PL Rn
When Rn > 0, 1 → T
Otherwise, 0 → T
Instruction Code
Privileged T Bit
0011nnnnmmmm1100 —
—
0111nnnniiiiiiii —
—
0011nnnnmmmm1110 —
Carry
New
—
—
—
0011nnnnmmmm1111 —
Overflow —
10001000iiiiiiii —
0011nnnnmmmm0000 —
0011nnnnmmmm0010 —
Comparison —
result
Comparison —
result
Comparison —
result
0011nnnnmmmm0011 —
Comparison —
result
0011nnnnmmmm0110 —
Comparison —
result
0011nnnnmmmm0111 —
Comparison —
result
0100nnnn00010001 —
0100nnnn00010101 —
Comparison —
result
Comparison —
result
Rev.1.00 Jan. 10, 2008 Page 55 of 1658
REJ09B0261-0100