SH7785 Datasheet, PDF (1672/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix
C.2 Handling of Unused Pins
Table C.2 Treatment of Unused Pins
Pin Name (LSI level)
A[25:0]
D[31:24]
D[23:16]
D[15:8]
D[7:0]
CS[6:1]
CS0
BACK/BSREQ
BREQ/BSACK
BS
R/W
RD/FRAME
RDY
WE0/REG
WE1
WE2/IORD
WE3/IOWR
DACK0
DACK1
Pin Name
(Module level)
Module I/O
A[25:0]
LBSC O
D[31:24] (default)
LBSC I/O
Port F[7:0]
GPIO I/O
D[23:16] (default)
LBSC I/O
Port G[7:0]
GPIO I/O
D[15:8]
LBSC I/O
D[7:0]
LBSC I/O
CS[6:1]
CS0
LBSC O
LBSC O
BACK/BSREQ (default) LBSC I/O
Port M0
GPIO I/O
BREQ/BSACK (default) LBSC I/O
Port M1
BS
GPIO I/O
LBSC O
R/W
RD/FRAME
LBSC O
LBSC O
RDY
WE0/REG
LBSC I
LBSC O
WE1
WE2/IORD
LBSC O
LBSC O
WE3/IOWR
LBSC O
Port K1(default)
DACK0
GPIO I/O
DMAC O
Port K0 (default)
DACK1
GPIO I/O
DMAC O
When Not in Use
Open
Open
Open
Open
Must be used
Open
Must be used
Open
Pulled to VDDQ
Open
Open
Open
Pulled-down to VSS*¹
Open
Open
Open
Open
Open
Open
Rev.1.00 Jan. 10, 2008 Page 1642 of 1658
REJ09B0261-0100