SH7785 Datasheet, PDF (337/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

10. Interrupt Controller (INTC)
(3) Interrupt Source Register (Affected by Mask States) (INT2A1)
INT2A1 is a 32-bit read-only register that indicates the interrupt sources of on-chip peripheral
modules. If an interrupt is masked by the interrupt mask register, the corresponding bit in INT2A1
is not set to 1. Use INT2A0 to check whether interrupts have been generated, regardless of the
state of the interrupt mask register.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
⎯⎯⎯
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Table 10.8 shows the correspondence between bits in INT2A1 and the interrupt sources.
Table 10.8 Correspondence between Bits in INT2A1 and Interrupt Sources
Initial
Bit Value R/W Source
Function
31 to 0
29
R Reserved
These bits are read as 0
and cannot be modified.
28 0
R GDTA
GDTA interrupt source
indication
27 0
R DU
DU interrupt source
indication
26 0
R SSI channel 1 SSI channel 1 interrupt
source indication
25 0
R SSI channel 0 SSI channel 0 interrupt
source indication
24 0
R GPIO
GPIO interrupt source
indication
23 0
R FLCTL
FLCTL interrupt source
indication
22 0
R MMCIF
MMCIF interrupt source
indication
21 0
R HSPI
HSPI interrupt source
indication
Description
These bits indicate the interrupt
source of each peripheral module
that is generating an interrupt.
(INT2A1 is affected by the setting
of the interrupt mask register).
0: No interrupt
1: An interrupt has occurred
Note: Interrupt sources can also
be identified by directly
reading the INTEVT code.
In this case, reading from
this register is not required.
Rev.1.00 Jan. 10, 2008 Page 307 of 1658
REJ09B0261-0100