SH7785 Datasheet, PDF (834/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

18. Timer Unit (TMU)
18.3.1 Timer Start Registers (TSTRn) (n = 0, 1)
The TSTR registers are 8-bit readable/writable registers that specifies whether TCNT of the
corresponding channel is operated or stopped.
• TSTR0
BIt: 7
6
5
4
3
2
1
0
— — — — — STR2 STR1 STR0
Initial value: 0
0
0
0
0
0
0
0
R/W: R R R R R R/W R/W R/W
Bit
7 to 3
2
1
0
Bit Name
—
STR2
STR1
STR0
Initial
Value R/W
All 0 R
0
R/W
0
R/W
0
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Counter Start 2
Specifies whether TCNT2 is operated or stopped.
0: TCNT2 count operation is stopped
1: TCNT2 performs count operation
Counter Start 1
Specifies whether TCNT1 is operated or stopped.
0: TCNT1 count operation is stopped
1: TCNT1 performs count operation
Counter Start 0
Specifies whether TCNT0 is operated or stopped.
0: TCNT0 count operation is stopped
1: TCNT0 performs count operation
Rev.1.00 Jan. 10, 2008 Page 804 of 1658
REJ09B0261-0100