SH7785 Datasheet, PDF (768/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

15. Clock Pulse Generator (CPG)
Table 15.3 Clock Operating Modes and Frequency Multiplication Ratio for Each Clock
(Both MODE12 and MODE11 Are Set to High Level)
Clock
FRQMR1
Operating Initial
Mode
Value
CPU
Clock
Ick
RAM
Clock
Uck
0
H'1225 2448 × 36 × 18
1
H'122B 244B × 36 × 18
2
H'1335 3558 × 36 × 12
3
H'133B 355B × 36 × 12
16
H'1225 2448 × 18 × 9
17
H'122B 244B × 18 × 9
18
H'1335 3558 × 18 × 6
19
H'133B 355B × 18 × 6
Frequency Multiplication Ratio (for Input Clock)
SuperHyway GDTA
Clock
Clock
SHck
GAck
Peripheral DDR
DU Clock Clock
Clock
DUck
Pck
DDRck
× 18
×9
×9
×3
× 18
× 18
×9
×9
× 3/2
× 18
× 12
×6
×6
×3
× 12
× 12
×6
×6
× 3/2
× 12
×9
× 9/2
× 9/2
× 3/2
×9
×9
× 9/2
× 9/2
× 3/4
×9
×6
×3
×3
× 3/2
×6
×6
×3
×3
× 3/4
×6
Bus
Clock
Bck
×6
× 3/2
×6
× 3/2
×3
× 3/4
×3
× 3/4
Table 15.4 Clock Operating Modes and Frequency Multiplication Ratio for Each Clock
(MODE12 or MODE11 Is Set to Low Level)
Clock
FRQMR1
Operating Initial
Mode
Value
CPU
Clock
Ick
RAM
Clock
Uck
0
H'1225 24F8 × 36 × 18
1
H'122B 24FB × 36 × 18
2
H'1335 35F8 × 36 × 12
3
H'133B 35FB × 36 × 12
16
H'1225 24F8 × 18 × 9
17
H'122B 24FB × 18 × 9
18
H'1335 35F8 × 18 × 6
19
H'133B 35FB × 18 × 6
Frequency Multiplication Ratio (for Input Clock)
SuperHyway GDTA
Clock
Clock
SHck
GAck
Peripheral DDR
DU Clock Clock
Clock
DUck
Pck
DDRck
× 18
×9
Stopped × 3
× 18
× 18
×9
Stopped × 3/2
× 18
× 12
×6
Stopped × 3
× 12
× 12
×6
Stopped × 3/2
× 12
×9
× 9/2
Stopped × 3/2
×9
×9
× 9/2
Stopped × 3/4
×9
×6
×3
Stopped × 3/2
×6
×6
×3
Stopped × 3/4
×6
Bus
Clock
Bck
×6
× 3/2
×6
× 3/2
×3
× 3/4
×3
× 3/4
Rev.1.00 Jan. 10, 2008 Page 738 of 1658
REJ09B0261-0100