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SH7785 Datasheet, PDF (1652/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer | |||
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32. Electrical Characteristics
32.3.18 Display Unit Signal Timing
Table 32.23 PCICLK/DCLKIN Signal Timing
Conditions: VDDQ = 3.3 V ±0.3 V, Ta = -40°C to + 85°C, GND = VSSQ = 0 V
Item
PCICLK/DCLKIN cycle time
PCICLK/DCLKIN high level width
PCICLK/DCLKIN low level width
Symbol Min.
t
20
DICYC
tDCKIH
8
tDCKIL
8
Typ.
â
â
â
Max.
â
â
â
Unit Figure
ns 32.72
ns
ns
Table 32.24 Display Timing
Conditions: VDDQ = 3.3 V ±0.3 V, Ta = â40°C to +85°C, GND = VSSQ = 0 V
Item
Symbol
Display input control
t
DS
signal setup time
Display input control
t
DH
signal hold time
DEVSEL/DCLKOUT
t
DCYC
output cycle time
DEVSEL/DCLKOUT
tDCKH
output high level width
Delay time of display
tDD
output control signal
output
Display digital data output t
DD
delay time
IRDY/HSYNC input low
level width
t
EXHLW
IRDY/HSYNC input high tEXHHW
level width
PCIFRAME/VSYNC input tEXVLW
low level width
LOCK/ODDF setup time 1 t
OD1
LOCK/ODDF setup time 2 t
OD2
Min.
5
3
20
6
-2
Typ.
â
â
â
â
â
-2
â
4Ãt
â
DCYC
4 Ã tDCYC
â
3 Ã HC
â
(ys + yw) Ã HC â
1 Ã HC
â
Max.
â
â
â
â
8
8
â
â
â
â
â
Unit
ns
ns
ns
ns
ns
ns
ns
ns
tDCYC
t
DCYC
t
DCYC
Figures
Figure 32.73
(with respect to
PCICLK/
DCLKIN)
Figure 32.74
(with respect to
DEVSEL/
DCLKOUT)
Figure 32.75
Rev.1.00 Jan. 10, 2008 Page 1622 of 1658
REJ09B0261-0100
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