SH7785 Datasheet, PDF (43/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

1.2 Block Diagram
A block diagram of the SH7785 is given as figure 1.1.
DDR2-SDRAM
DDR2-400/600
1 GB max
ROM
NOR Flash
SRAM
PC Card/ATA3
32 bit/16 bit
300 MHz
DDR bus
Super Hyway
SH-4A
Superscalar CPU
FPU
MMU
32 KB I-cache
32 KB O-cache
8 KB ILRAM
16 KB OLRAM
URAM
128 KB
DDRII-SDRAM
Controller
(DBSC)
64*/32/16
/8 bit
100 MHz
Local bus
INTC
Local Bus
Controller
SRAM, ROM,
PCMCIA
MPX
GDTA
1. Overview
Periperal bus
SCIF0/HSPI/FLCTL
SCIF2/MMCIF
HAC/SSI/SIOF
HAC/SSI
TMU, WDT
Peripheral Bus Controller
Display Unit
DMA
Controller
PCI
Controller
CPG
Debug
32 bit
33/66 MHz
PCI bus
Note: * The PCI bus and the display unit are not available when the local bus width is 64 bits.
The PCI controller and the display unit cannot be used when the local bus width is 64 bits.
Figure 1.1 SH7785 Block Diagram
Rev.1.00 Jan. 10, 2008 Page 13 of 1658
REJ09B0261-0100