SH7785 Datasheet, PDF (1180/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

22. Serial I/O with FIFO (SIOF)
(8) Synchronization-Pulse Output Mode at End of Each Slot (SYNCAT Bit = 1)
Synchronous pulse method, falling edge sampling, slot No.0 used for left-channel data, slot No.1
used for right-channel data, slot No.2 used for control channel 0 data, slot No.3 used for control
channel 1 data, and frame length = 128 bits
SIOF_SCK
SIOF_SYNC
SIOF_TXD
SIOF_RXD
1 frame
L-channel
data
Slot No.0
R-channel
data
Slot No.1
Control
channel 0
Slot No.2
Control
channel 1
Slot No.3
Slot No.4 Slot No.5
Slot No.6
Slot No.7
Specifications: TRMD[1:0] = 00 or 10,
TDLE = 1,
RDLE = 1,
CD0E = 1,
REDG = 0,
TDLA[3:0] = 0000,
RDLA[3:0] = 0000,
CD0A[3:0] = 0010,
FL[3:0] = 1110 (frame length: 128 bits),
TDRE = 1, TDRA[3:0] = 0001,
RDRE = 1, RDRA[3:0] = 0001,
CD1E = 1, CD1A[3:0] = 0011
Figure 22.20 Transmit and Receive Timing (16-Bit Stereo Data)
Rev.1.00 Jan. 10, 2008 Page 1150 of 1658
REJ09B0261-0100