SH7785 Datasheet, PDF (1570/1692 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

31. Register List
Module
Name
DMAC
Name
Abbrev.
Power-on
Reset by
PRESET Pin/
WDT/H-UDI
Manual Reset
by
WDT/Multiple
Exception
Sleep/
Deep Sleep by
SLEEP
Module
Instruction Standby
DMA source address register B1
SARB1 Undefined
Undefined
Retained
Retained
DMA destination address register B1 DARB1 Undefined
Undefined
Retained
Retained
DMA transfer count register B1
TCRB1 Undefined
Undefined
Retained
Retained
DMA source address register B2
SARB2 Undefined
Undefined
Retained
Retained
DMA destination address register B2 DARB2 Undefined
Undefined
Retained
Retained
DMA transfer count register B2
TCRB2 Undefined
Undefined
Retained
Retained
DMA source address register B3
SARB3 Undefined
Undefined
Retained
Retained
DMA destination address register B3 DARB3 Undefined
Undefined
Retained
Retained
DMA transfer count register B3
TCRB3 Undefined
Undefined
Retained
Retained
DMA extended resource selector 0 DMARS0 H'0000
H'0000
Retained
Retained
DMA extended resource selector 1 DMARS1 H'0000
H'0000
Retained
Retained
DMA extended resource selector 2 DMARS2 H'0000
H'0000
Retained
Retained
DMA source address register 6
SAR6
Undefined
Undefined
Retained
Retained
DMA destination address register 6 DAR6
Undefined
Undefined
Retained
Retained
DMA transfer count register 6
TCR6
Undefined
Undefined
Retained
Retained
DMA channel control register 6
CHCR6 H'4000 0000 H'4000 0000 Retained
Retained
DMA source address register 7
SAR7
Undefined
Undefined
Retained
Retained
DMA destination address register 7 DAR7
Undefined
Undefined
Retained
Retained
DMA transfer count register 7
TCR7
Undefined
Undefined
Retained
Retained
DMA channel control register 7
CHCR7 H'4000 0000 H'4000 0000 Retained
Retained
DMA source address register 8
SAR8
Undefined
Undefined
Retained
Retained
DMA destination address register 8 DAR8
Undefined
Undefined
Retained
Retained
DMA transfer count register 8
TCR8
Undefined
Undefined
Retained
Retained
DMA channel control register 8
CHCR8 H'4000 0000 H'4000 0000 Retained
Retained
DMA source address register 9
SAR9
Undefined
Undefined
Retained
Retained
DMA destination address register 9 DAR9
Undefined
Undefined
Retained
Retained
DMA transfer count register 9
TCR9
Undefined
Undefined
Retained
Retained
DMA channel control register 9
CHCR9 H'4000 0000 H'4000 0000 Retained
Retained
DMA operation register 1
DMAOR1 H'0000
H'0000
Retained
Retained
Rev.1.00 Jan. 10, 2008 Page 1540 of 1658
REJ09B0261-0100